Silicon-on-insulator (SOI) transistors, such as silicon-on-sapphire (SOS), are generally known in the art. These transistors generally include a substrate of insulating material, such as sapphire, with a plurality of single crystalline silicon islands formed thereon. The structure can then be planarized by depositing an insulating material, such as silicon dioxide, on the areas which surround the islands. Conventional masking and doping techniques are then used to form MOS field-effect transistors and other devices in and on the silicon islands.
There are a number of techniques in the prior art. for forming these structures. One such technique is described in commonly assigned U.S. Pat. No. 3,740,280 entitled METHOD OF MAKING SEMICONDUCTOR DEVICE issued June 19, 1973 to R. S. Ronen. An SOS semiconductor device is fabricated by first forming a plurality of single crystalline silicon islands on an insulating substrate, such as sapphire or spinel. An opaque masking layer is then formed on the top surfaces of the silicon islands. An insulating material, such as silicon dioxide, is coated over the exposed portions of the substrate between and around the islands and over the opaque masking layer. A photosensitive resist is then coated over the insulating layer. Light is directed onto the uncovered surface of the substrate so as to expose portions of the photoresist which do not overlie the opaque masking layer. The portions of the photoresist which overlie the opaque masking material are removed using a conventional solvent. Using the remaining photoresist as a mask, the insulating material directly overlying the silicon island is removed using a conventional etching technique. Then, the opaque masking layer is removed so as to expose the top surfaces of the silicon islands. Various active and passive components are then formed in or on each of the silicon islands using techniques well known in the art.
A second method for forming silicon-on-sapphire devices is disclosed in commonly assigned U.S. Pat. No. 4,178,191 entitled PROCESS OF MAKING A PLANAR MOS SILICON-ON-INSULATING SUBSTRATE DEVICE issued Dec. 11, 1979 to D. W. Flatley. Epitaxial silicon is first grown on the planar surface of the sapphire substrate. Then, a plurality of masking layers are applied to the epitaxially grown silicon. Portions of the masking layers are removed to expose selected regions of the epitaxial silicon layer. An anisotropic silicon etchant is applied to the unmasked surfaces of the silicon layer. The unmasked silicon is etched down to a depth of about half of its original thickness. The remaining exposed silicon is then thermally oxidized to form silicon dioxide in the areas which surround the epitaxial silicon islands.
The above prior art processes have numerous drawbacks. The process described in U.S. Pat. No. 3,740,280 requires light to be directed onto the uncovered or bottom surface of the substrate. However, the exposure apparatus used in a conventional semiconductor manufacturing operation is designed to direct light toward the top or coated surface of the substrate. Thus, the conventional semiconductor manufacturing line must be modified to include a special exposure apparatus which has the capabilities of shining light toward the bottom or uncoated surface of the substrate.
The process described in U.S. Pat. No. 4,178,191 has a disadvantage of requiring the epitaxial silicon to be etched to a depth of about half of its original thickness. It is very difficult in the etching art to repeatedly etch epitaxial silicon to a desired depth. If the epitaxial silicon is not etched to the proper depth, the subsequent oxidation step will produce a silicon dioxide layer which is not substantially coplanar with the silicon islands. Additionally, if the silicon is etched to less than the prescribed depth, the subsequent oxidation step may not oxidize all of the silicon between the islands. The remaining silicon can form a conductive path between the active devices formed in the silicon islands.